Memory and Storage

Mitigation strategy

1. **Implement Hardware-Level Rowhammer Mitigations:** Utilize advanced hardware features such as **Target Row Refresh (TRR)**, **Probabilistic Row Activation Counting (PRAC)**, or machine learning-based detection within the memory controller (MC) or DRAM to reliably detect and prevent aggressive memory access patterns that induce bit flips. This directly addresses the underlying hardware vulnerability. 2. **Deploy Runtime Model Integrity Verification:** Employ integrity verification mechanisms (e.g., **HashTAG** or checksums) at runtime to continuously monitor the model's parameters. This allows for the immediate detection of unauthorized modifications, such as those caused by bit-flip attacks, and ensures the integrity of the Large Language Model's (LLM) weights before inference. 3. **Incorporate Model-Level Bit-Flip Attack (BFA) Defenses:** Integrate defensive techniques at the neural network architecture level, such as **model obfuscation** (e.g., inserting dummy layers or neurons) or **quantization/binarization** of model weights. These methods are designed to significantly increase the number of precise bit flips required to degrade the model's accuracy, thus raising the cost and difficulty of a successful DeepHammer-style attack.